Development of a PCI Express Based Readout Electronics for the XPAD3 X-Ray Photon Counting Image

International audienceXPAD3 is a large surface X-ray photon counting imager with high count rates, large counter dynamics and very fast data readout. Data are readout in parallel by a PCI Express interface using DMA transfer. The readout frame rate of the complete detector comprising 0.5 MPixels amounts to 500 images per second without dead-time

XPAD: pixel detector for material sciences

Currently available 2D detectors do not make full use of the high flux and high brilliance of third generation synchrotron sources. The XPAD prototype, using active pixels, has been developed to fulfil the needs of materials science scattering experiments. At the time, its prototype is build of eight modules of eight chips. The threshold calibration of /spl ap/4 10/sup 4/ pixels is discussed. Applications to powder diffraction or SAXS experiments prove that it allows to record high quality data

HV/HR-CMOS sensors for the ATLAS upgrade—concepts and test chip results

In order to extend its discovery potential, the Large Hadron Collider (LHC) will have a major upgrade (Phase II Upgrade) scheduled for 2022. The LHC after the upgrade, called High-Luminosity LHC (HL-LHC), will operate at a nominal leveled instantaneous luminosity of 5× 1034 cm−2 s−1, more than twice the expected Phase I . The new Inner Tracker needs to cope with this extremely high luminosity. Therefore it requires higher granularity, reduced material budget and increased radiation hardness of all components. A new pixel detector based on High Voltage CMOS (HVCMOS) technology targeting the upgraded ATLAS pixel detector is under study. The main advantages of the HVCMOS technology are its potential for low material budget, use of possible cheaper interconnection technologies, reduced pixel size and lower cost with respect to traditional hybrid pixel detector. Several first prototypes were produced and characterized within ATLAS upgrade R&D effort, to explore the performance and radiation hardness of this technology. In this paper, an overview of the HVCMOS sensor concepts is given. Laboratory tests and irradiation tests of two technologies, HVCMOS AMS and HVCMOS GF, are also given

Radiation-hard active pixel sensors for HL-LHC detector upgrades based on HV-CMOS technology

Luminosity upgrades are discussed for the LHC (HL-LHC) which would make updates to the detectors necessary, requiring in particular new, even more radiation-hard and granular, sensors for the inner detector region. A proposal for the next generation of inner detectors is based on HV-CMOS: a new family of silicon sensors based on commercial high-voltage CMOS technology, which enables the fabrication of part of the pixel electronics inside the silicon substrate itself. The main advantages of this technology with respect to the standard silicon sensor technology are: low material budget, fast charge collection time, high radiation tolerance, low cost and operation at room temperature. A traditional readout chip is still needed to receive and organize the data from the active sensor and to handle high-level functionality such as trigger management. HV-CMOS has been designed to be compatible with both pixel and strip readout. In this paper an overview of HV2FEI4, a HV-CMOS prototype in 180 nm AMS technology, will be given. Preliminary results after neutron and X-ray irradiation are shown

Prototype ATLAS IBL Modules using the FE-I4A Front-End Readout Chip

The ATLAS Collaboration will upgrade its semiconductor pixel tracking detector with a new Insertable B-layer (IBL) between the existing pixel detector and the vacuum pipe of the Large Hadron Collider. The extreme operating conditions at this location have necessitated the development of new radiation hard pixel sensor technologies and a new front-end readout chip, called the FE-I4. Planar pixel sensors and 3D pixel sensors have been investigated to equip this new pixel layer, and prototype modules using the FE-I4A have been fabricated and characterized using 120 GeV pions at the CERN SPS and 4 GeV positrons at DESY, before and after module irradiation. Beam test results are presented, including charge collection efficiency, tracking efficiency and charge sharing.Comment: 45 pages, 30 figures, submitted to JINS

XPAD: A Photons Counting Pixel Detector for Material Sciences and Small Animal imaging

A paraître dans NIMInternational audienceExperiments on high flux and high brilliance 3rd generation synchrotron X-ray sources are now limited by detector performance. Photon counting hybrid pixel detectors are being investigated as a solution to improve the dynamic range and the readout speed of the available 2D detectors. The XPAD2 is a large surface hybrid pixel detector (68 x 65 mm$^2$) with a dynamic response which ranges from 0.01 photons/pixel/s up to 10$^6$ photons/pixel/s. High resolution data have been recorded using the XPAD2. The comparison with data measured using a conventional setup shows a gain on measurement duration by a factor 20 and on dynamic range. A new generation of pixel detector (XPAD3) is presently under development. For this, a new electronic chip (the XPAD3) has been designed to improve spatial resolution by using 130 $\mu$m pixels and detector efficiency by using CdTe sensors. XPAD2 is also operated with PIXSCAN, a CT-scanner for mice